Next-gen AMD CPUs could feature up to 32 cores per die
Next-gen AMD CPUs could feature up to 32 cores per die
Both the upcoming AMD Zen 5c and Zen 6 processors look set to have far more cores per chiplet than previous Ryzen CPUs.
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Doesn't c stand for e-cores? Packing up to 32 e-cores must be easier than with normal cores.
Also kinda wish they went the other direction a little, cut cure counts and put more cache across all levels on some cores instead for better single thread performance, a 'very big' core so to say. Intel's cache sizes have been larger then amd since alder lake and there stayed competitive despite their process node disadvantage
Not quite an e-core but the goal is the same: Make more efficient use of the available die space by packing in more, slower cores.
The difference is that Intel's e-cores achieve this by having a different architecture and support less features than their p-cores. E-cores for example do not support multi threading. E-cores are about 1/4 the size of a o-core.
AMD's 4c cores support the same features and have the same IPC as full zen 4 cores but operate at a lower clock speed. This reduces thermal output of the core, allowing them to pack in the circuitry much more densely.
Undoubtedly Intel's e-cores take advantage of this effect as well and they are in fact quite a bit smaller than 4c: a 4c core is about 1/2 the size of a zen 4 core. The advantage of AMD's approach is that having the cores be the same simplifies the software side of things.
AMD's c cores aren't quite the same as Intel's e cores. Intel's e-cores are 1/4 of the size of their P cores, while AMD's c cores are about the same size as their standard cores, but a bit more square shaped geometrically.
Intel's e cores are completely different architectures from their p cores, while the only difference between AMD's cores are a bit less cache and a bit lower frequency.
Intel's are like comparing an Raspberry pi core to a full x86 core, while AMD's is like a lower binned regular core.
AMD has "big" cores, too. Their 3d vcache models trade multithreaded performance for more cache. Their "3 core tiers" approach is very obvious in their server line up:
https://www.servethehome.com/amd-epyc-bergamo-epyc-9754-cloud-native-sp5/