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RISC-V
I want open-source hardware
155 0 ReplyIs there a good resource out there for wrapping my head around RISC-V? Last time I read a wiki my head hurt haha. Seems cool, though.
24 0 ReplyIn principle it's just "slimmer ARM!. RISC-V is also extremely dedicated to using memory mapped IO rather than older style IO x86_64 supports.
Think lots of registers, a fun zero register that is always zero, and memory mapped IO.
22 0 ReplyI for one think we need a register for each unsigned integer, why is zero so special? :P
Or if we can't get that, at least every power of 2 and power of 2 minus 1.
Maybe I can submit a proposal for risc-VI 🤣
5 0 ReplyMaybe I can submit a proposal for risc-VI 🤣
No need! You can make your own custom extension! If the silicon doesn't support it, then you can provide firmware to emulate it.
9 0 ReplyI think a register for each of the primes should be enough.
5 0 Reply
ARM is also reduced-instruction set but I don't know how they differ. Is the instruction set somehow more reduced?
3 0 ReplyAren't they more like a hybrid instruction set and architecture?
3 0 Reply
Imma stick with ARM and x64 ngl, ik it's not open hardware but I don't really mind that but cool to hear.
1 4 Reply